Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI don't expect counter restrain to improve speed much as the main bottleneck is your long comb path.
By delay I mean one clock period per register so you don't need quartus to tell you. If you register a node then it is updated one clock later if it is a signal. But if it is a variable then it is updated without clock delay. Use of variable is a bit tricky, normally it implies no register i.e. comb. section within clocked process. But there is one exception and that is if variable is read before its assignment, in this case compiler understands it as you want to keep value at end of process and so creates a register and thus becomes equivalent to signal...rather confusing.