Is is gonna be very long propagation time for multi-bits mux?

Thanks for clarification. This is a simple mux involving one LE in combinational mode per bit. The delay caused by a single LE, as it would count between two registers is considerably below a nanosecond. Most of the delay in your test is caused by the I/O cells, particularly the output driver.

Generally, the available speed of the internal logic will be observed by the Quartus timing analysis. For a simple design, involving only a single system clock, you can try the Classical Timing Analyzer to get an idea. You will notice, that when the logic path between registers gets longer, the maximum achievable clock frequency will drop.

For asynchronous circuits as your above example no maximum clock frequency can be calculated unless registers come into play.