Forum Discussion
LSant1
Occasional Contributor
Occasional ContributorIP Core simulation
I am new to FPGA design using IP cores. I am trying to simulate an IP core design example. Per the user guide, I need to run a tb_run.do script which in turn calls msim_setup.tcl script. I am wonderi...
AnandRaj_S_Intel
Regular Contributor
Regular ContributorHi Lakshmi,
I have used Quartus 18.0 pro Modelsim version 10.6c.
https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug-20016.pdf
- Generated an example design for (Low Latency Ethernet 10G MAC Intel FPGA IP).
- We have recreated the scenario.
vsim -c -do tb_run.tcl
# No design specified
Let me check and com back on this.
Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)
