New Contributor
New ContributorHi Sheng,
Can you tell me what the progress is on this issue? The link you provided is no longer valid. As per your last email, the fix was planned for Q22.3 but I can still see incorrect behavior in 22.4.0 Pro Edition. If there is a workaround or a patch, that would be great as I am avoiding upgrading Quartus versions due to other unrelated support issues.
Thanks,
Nadine
Super ContributorHi,
Sorry for delay reply,
Engineering had confirmed that the behaviour is correct check below:
The bubble is to indicate the inversion to compensate for the active low oe port of the obuf. So, what you see in the tech map view is actually correct.
I see the RPI is not set for out1 to invert the core signal to OE. However, we use RBC to set the programmable invert for the OE inside fm_gpio to compensate for OE being active low. So, it should work fine.
And we also have BCM simulation of a design similar to the sample test design and it is working fine.
set up running BCM simulation for design tri_test.zip.
Looking at the result, the behaviour of the OE is expected.
The RTL is:
assign out1 = (en1) ? clk1 : 1'bz;
The simulation waveform is:
You can see when en1 is low, out1 is Z regardless of clk1.
You can also see when en1 is high, out1 follows clk1.
