Interpretation of numberic constants as signed/unsigned

The basic answer is - you cant.

VHDL leaves integer to be platform defined - so it can be 16, 32 64 or however many bits the compiler choses to use - but most use 32 bit. And it is always signed. So FF_FF_FF_FF = -1. You cannot have a 32 bit unsigned integer in VHDL.

Instead of trying to use integer for your uint32, why not use the unsigned type? this has an unlimited bit width, and you can define each signal as it's own width:

signal a : unsigned(3 downto 0);

signal b : unsigned(31 downto 0);

signal c : unsigned(1023 downto 0);

you can even define a subtype if you wanted:

subtype uint32 is unsigned(31 downto 0);