Honored Contributor
Honored ContributorMore specifically, this is what I am seeing if it helps:
hello_world>aoc device\hello_world.cl -o bin\hello_world.aocx -v aoc: Environment checks are completed successfully. You are now compiling the full flow!! aoc: Selected default target board a10gx aoc: Running OpenCL parser.... aoc: OpenCL parser completed successfully. aoc: Compiling.... aoc: Linking with IP library ... Could not acquire a valid license for the Intel(R) FPGA SDK for OpenCL(TM). Stack dump: 0. Program arguments: C:/intelFPGA_pro/16.1/hld/windows64/bin/aocl-llc -mar ch=fpga -mattr=option3wrapper -fpga-const-cache=1 -board c:/intelFPGA_pro/16.1/h ld/board/a10_ref/hardware/a10gx/board_spec.xml -dbg-info-enabled hello_world.bc -o hello_world.v Error: Verilog generator FAILED. Refer to hello_world/hello_world.log for details.
