Honored Contributor
Honored ContributorHi Hamidreza,
--- Quote Start --- I'm going to use a LEON cpu with nios2 cpu together on stratix iv. In this regard, I need to have an AHB-to-avalon bridge, by which I establish the communication. Would you please help me. --- Quote End --- Sure, I'll try :) --- Quote Start --- Is there any avalon-to-ahb bridge supported in quartes, either in SOPC builder, or Qsys? --- Quote End --- There is not a bridge in Altera's provided IP. In Quartus II version 12.0 there will be AXI4 bridges, however, I doubt they will have support for all AMBA protocols. I'd recommend designing your own AHB-to-Avalon bridge, it shouldn't be too difficult. 1) Set up a LEON simulation in Modelsim 2) Boot the processor and perform a read and write transaction to the external bus 3) Map or convert the transaction into an equivalent Avalon-MM transaction If the AHB bus implements posted writes and pipelined reads, then you should be able to create the above pretty easily. If the buses are a little more different, then you can use a FIFO to implement the bridge. On one side of the FIFO you have a slave that accepts AHB transactions and writes a read/write command into the FIFO, and then on the other side of the FIFO, you have an Avalon-MM master that reads the command and then issues an Avalon-MM command. You use a FIFO so that the LEON can post writes without having to wait for them to complete on the Avalon-MM slave. Cheers, Dave
