Integer used as parameter

The purpose of this construct isn't understandable

for (i =1; i<11; i=i+1)
LED <=LED ;

The "not constant" error is from using a variable part select, which isn't legal Verilog Syntax. A variable bit select as LED[i-1] would be allowed in contrast. But I'm under the impression, that you also misunderstood the operation of a Verilog for loop. So you may want to clarify your intentions first.

From the code snippet, I don't see the reason for causing an infinite loop ("5000 loop iterations").

The clock problem should be solved by a single (usually fast) clock and multiple clock enables.