Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Instanciating dual port memory with different r/w widths

Im trying to get Quartus to infer a vhdl array of record as dual port memory with write side being a 32bit, and read side a N*32bit datawidth. To make it even more difficult, I need it to be inferred...