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Altera_Forum's avatar
Altera_Forum
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18 years ago

Input/Output assignments for external memory

Hello,

I am attempting to design a program that will load data onto an external RAM through an FPGA. Following this, however, I would like to read that same data from the RAM for use later in the circuit. I am having an issue in assigning the data pins on the external RAM in the FPGA. I need to use these pins as input and output, but Quartus only allows me to assign each pin once. How do I get around these limitations to achieve my goals? Thanks.

Andre

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    Obviously, the data pins must have inout type and your design has to perform some multiplexing as in the example below (used for a static RAM): 

    IF Wave_RD = '1' THEN
  RAM_nWEi <= '1';
  RAM_Data <= "ZZZZZZZZZZZZZZZZ";
  RAM_Adr <= Wave_Adr;
  RAM_nOE <= '0';		
  RAM_nCE <= '0';
  RAM_nLB <= '0';
  RAM_nUB <= '0';
ELSIF Osc_WR = '1' THEN
  RAM_nCE <= '0';
  RAM_nOE <= '1';		
  RAM_nWEi <= '0';
  RAM_nLB <= '0';
  RAM_nUB <= '0';
  RAM_Adr <= Osc_Adr;
  RAM_Data <= Osc_Data;
ELSE 
  RAM_nCE <= '1';
  RAM_nOE <= '1';		
  RAM_nWEi <= '1';
  RAM_Data <= "ZZZZZZZZZZZZZZZZ";
END IF;

    The final RAM_nWE is formed by gating RAM_nWEi with phase shifted PLL clock to assure setup- and hold times for write data and addresses.