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Altera_Forum
Honored Contributor
10 years agoInferred RAM: Pass-through logic generated despite no_rw_check
Dear all, I'm a hobbyist currently learning VHDL. My learning vehicle is a self-developed RISC-V CPU that that I develop in the Lite edition of Quartus Prime 15.1. The CPU is working fine alrea...
Altera_Forum
Honored Contributor
10 years agoWhile it doesnt match the coding style in the guildlines, quartus is normally very good at recognising rams from code that doesnt quite match the guidelines.
I would try the wrapper as suggested for now, but also raise a mysupport request to try and understand why it doesnt work from your original code, and raise an enhancement request if it turns out to be a fault/deficit in the synthesis engine.