Forum Discussion

Geert's avatar
Geert
Icon for New Contributor rankNew Contributor
5 years ago

Inference of DSP block with accumulator does not work

I'm trying to infer a DSP block with accumulator for Arria 10, using Quartus Prime 17.0. The high-level functionality I need is: if rising_edge(clk) then if sload = '1' then out <= a * ...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi Greet,


If you are using an independent multiplier, could you please increase the input data width to >19 bits? If using lower than 18 bits, it will not fit into the hard accumulator.


Regards -SK Lim


Geert's avatar
Geert
Icon for New Contributor rankNew Contributor
5 years ago

Hi,

Thanks for your answer.

I have tried with multiple different input sizes and indeed, 2x 16-bit multiplier inputs fails (accumulator is implemented in LUTs) , while with a 16-bit + a 24-bit input, I got the expected implementation (hard accumulator).

Could you explain what the exact criterion is? Is it the multiplier result that needs to have a minimal width, or is it just sufficient that one of the multiplier inputs is > 18 bits?

regards,

Geert