Altera_Forum
Honored Contributor
12 years agoInduced delay
I have just started learning how to use VHDL and Quartus and I use it for a Cyclone II FPGA.
I need to write a code , which makes my Output High after a fixed time interval , 60 seconds for example. Thus I wrote the following code for the same, however it gives me a warning that my Output pins are stuck at VCC and therefore the the Output ( an LED ) , which is ideally supposed to be OFF and glow only after 60 seconds, is always ON. I also tried using a wait for 60 seconds statement, however that gives me a Wait statement error, saying that at WAIT UNTIL is required. --------------------- The code is library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.numeric_std.all; entity timer is port ( q : buffer bit := '0'); end entity; architecture behaviour of timer is begin q <= '1' after 60 sec; end behaviour;