ContributorHi,
A compilation time of the design, which has been changed just slightly, increased dramatically - by about x2.3-x3 times.
What should I check in order to figure out the cause why the compilation time has been increased dramatically?
I know what multi-driven nets may increase the compilation time a lot. What's else?
BTW, how can I report the multi-driven nets in the design?
Thank you!
Super ContributorWhy would you have multiple-driven nets in the design? Multiple-driven nets often leads to erroneous results within a design and might result in wrong RTL functionality. Driving a net with multiple signals are not considered as good design practice.
Could you check the Quartus compilation warning message that might indicate a net is driven by multiple drivers?
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.
ContributorDriving a signal by multiple drivers is due to the wrong RTL coding.
What's warning number assigned to the multi-driven nets in the compilation log?
In some thread I have read that the multi-driven nets are not allowed and this actually issues an ERROR during the compilation and actually stops the compilation/synthesis.
So, are the multi-driven nets ERROR or WARNING? If this is just a Warning, how could it be re-assigned to Error?
Super ContributorPlease help to login to ‘https://supporttickets.intel.com’ to re-open the case, else your question may go unnoticed.
I do not have the answer to which specific error message may comes up in the compilation report but you may search for similar message in the webpage below. e.g. multiple drivers. Only by sharing the whole project .qar file, then I will be able to help on this. Else it likes looking for a needle in a haystack.
Promote warning to error by right-click the warning message > Message Promotion > Promote Critical Message ID to Error.
Or set in the .qsf assignment.
set_global_assignment -name PROMOTE_WARNING_TO_ERROR <error id>
The current Quartus standard 21.1 does not have this feature.
Best Regards,
Richard Tan
Super ContributorA long compilation time could be caused by multiple factors - there is no easy answer. Name a few: a larger design used, a different devices, changes in project settings, design coding style, a large address/data width RAM or possible a bug in the tool.
Example KDB:
https://www.intel.com/content/www/us/en/support/programmable/articles/000080504.html
You may checkout this user guide on how to reducing compilation time:
https://www.intel.com/content/www/us/en/docs/programmable/683236/22-3/reducing-compilation-time.html
I hope my reply helps in answering your questions.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.
Super ContributorMay I know does my replies help to answer your questions?
Super ContributorAs we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.
Super ContributorProbably would need to see your code and the exact message you are seeing to help out here.
