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Altera_Forum's avatar
Altera_Forum
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12 years ago

incomplete sensitivity list check in Quartus II

I wrote some VHDL code with incomplete sensitivity list as following and compile it with Quartus II. But, Quartus II didn't give any warnings on this. Does anybody know how to make quatus ii to ch...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

In this code there is no incomplete sensitivity list because the general description of a register is:

process(clk)

begin

if rising_edge(clk) = '1' then

q_reg <= q_next;

end if;

end process;

The process only activates on clk change ( when you change the input of flip-flop D, the output don't change until active clock edge). So you don't need q_next or equivalent expression in the sensitivity list.