"Incomplete power management settings for a VID device"
Hello -
I am working with an Intel Stratix 10 development kit. The model number is DK-DEV-1SGX-L-A. The FPGA type is 1SG280LU2F50EV2G.
The design I am working with is the "AN 829: PCI Express* Avalon® -MM DMA Reference Design."
Originally, I was able to compile the design for the Stratix 10, but it used the H-tile part,
from the DK-DEV-1SGX-H-A development kit, where the FPGA is a 1SG280HU2F50E2VG device. (difference: HU vs. LU in device part number.)
So in Quartus I selected the proper device type. This triggered an auto-update of the IP to be used in building the device. The auto-update seemed to go without error.
However, on recompiling the project, I get the warnings shown in the attached screenshot. And indeed, no bitstream (.sof file) for the device is generated.
I am in over my head on this. I would welcome any advice on how to debug and hopefully correct this problem.
Best Regards,
John Sambrook
Common Sense Systems, Inc.