Forum Discussion
Hi Wincent -
Thanks for the quick turn around on this. Much appreciated.
I will give your proposed solution a try
Where can I find a pin-out for the FPGA and maybe a schematic for the development board?
I want to make sure I am making the proper connections.
Do you know if the power management connections in the H-tile part (1SG280HU2F50E2VG) would be the same as for the L-tile part, (1SG280LU2F50EV2G)? If the H-tile part is also VID capable, perhaps I could look at the connections that exist for the H-tile part and make them the same for the L-tile part?
Thanks again for any advice you or anyone else can provide.
Best,
John Sambrook
Common Sense Systems, Inc.
Hi,
For Stratix 10 Schematic you may get at link below
https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/stratix/10-gx.html
For Pin-out file please refer
https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html
Power manager for H/L tile
https://www.intel.com/content/www/us/en/docs/programmable/683667/21-1/power-management.html
Hope this answer your question, let me know if further clarification is needed.
Regards,
Wincent_Intel