In verilog when the default case in a case statement is ignored by synthesis

You may be free to choose your own encoding scheme, but the tools still need to honor the default case. It was put there for a reason. The tool should not arbitrarily decide it is not needed. Further more, for the user-encoded option, the documentation does not say one way or the other if the default is ignored when user-encoded is chosen. That was my original question and I still do not know for sure, however my suspicion is that unless safe is specified the default case will be ignored. Quartus should at least have included in the map.rpt that the default case is not reachable and will be ignored. We would have caught that allot easier than finding a blurb buried on page 914 of a 1000 page document.