After creating the list of modifications in the ECO file using Change Manager in Chip Planner, I exported the modifications as a tcl file. But I can’t import this file into the project. After start...
the problem appears in case of a change in the structure of the adder. Each adder is placed in a specific LAB using LogicLock.
The first cell of each adder always has Operation Mode: Normal.
Subsequent cells have Operation Mode: Arithmetic.
The last cell in LAB again has Operation mode: Normal.
I need each adder to be connected via Cin / Cout carry chains and not through Combout / DataABCD.
As a result of the corrections in the Resource Property Editor, I delete the LEs that work in normal mode and connect each LAB through the carry chains.
But after executing "Check And Save netlist", fitter cannot route every adder in the specified LAB, but route them outside of LogicLock. In this case, the adders are routed vertically, not horizontally.
I guess the problem is not with LogicLock itself, but with the principles of the LE structure.