Honored Contributor
Honored ContributorI was unaware of the restriction. I'm trying to piecemeal things together with what I see on the web and a VHDL book I have written by a Peter Ashenden. It seems Ashenden's book is popular, but I don't always follow his syntatical examples.
I'm trying to develop an VHDL entity to roughly simulate the bounces that a physical relay switch exhibits before it latches onto a changed state. This is something that the powers that be at where I work want, so I was tasked to implement this. In other words, I want to generate a pulse waveform for a user-specified time for each pulse outputted before the output goes to its final complementary state. If I understand you correctly, you're suggesting that I use a countdown timer. If so, I'm not visualizing how this all works out. So I'm looking at an example from a website called VHDL Guru and they have an example of a 4-bit Johnson counter, but I'm not sure of is how many bits should be sufficient for a counter to gauge time duration? I was told that the range of time I may want to consider would be 0.1 to 10ms.
