Implement mux using for loop

Hi sstrell,

Thank you for your reply. I saw this construction working elsewhere and it is much better than a case statement aspecially when your mux start to be huge.

It's already big just for MUX8 so imagine for MUX16 or MUX32:

type array_type is array (7 downto 0) of std_logic_vector(15 downto 0);
signal mux_in:    array_type;
signal mux_slct: unsigned(2 downto 0);
signal mux_out: std_logic_vector(15 downto 0);
...
p_mux : process(mux_slct,mux_in)
begin
   case mux_slct is
      when 0 => mux_out <= mux_in(0);
      when 1 => mux_out <= mux_in(1);
      when 2 => mux_out <= mux_in(2);
      when 3 => mux_out <= mux_in(3);
      when 4 => mux_out <= mux_in(4);
      when 5 => mux_out <= mux_in(5);
      when 6 => mux_out <= mux_in(6);
      when 7 => mux_out <= mux_in(7);
      when others => mux_out <= (others=>'0');
   end case;
end process p_mux;

The first version contains less redundancy and is I think much more readable and code is better for maintenance.

No idea why Quartus deosn't want to synthesise it as I want?

Cheers