im am trying to Build a 8-bit to 16-bit left combinatorial shifter using the IF-THEN statements and im getting errors

the specifications are athat is shift cntrl =0 then no shift if shift cntrl = 1 then shift 4 to the left, if shift cntrl =2 then shift left 8 and if shift cntrl=3 then no shift

my current code is

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.NUMERIC_STD.all;

use IEEE.STD_LOGIC_UNSIGNED.all;

entity shifter is

port (

input: in UNSIGNED(7 downto 0);

shift_cntrl: in UNSIGNED(1 downto 0);

shift_out : out UNSIGNED(15 downto 0) :="0000000000000000"

);

end entity shifter;

architecture shift of shifter is

begin

shifting : process(input,shift_cntrl)

begin

if shift_cntrl='00' then

shift_out <= input;

elsif shift_cntrl='01' then

shift_out<= shift_left(unsigned(input),4);

elsif shift_cntrl='10' then

shift_out<= shift_left(unsigned(input),8);

elsif shift_cntrl='11' then

shift_out <= input;

end if;

end process shifting;

end architecture;

when i run it i get the following errors

Error (10500): VHDL syntax error at shifter.vhd(19) near text "'"; expecting "(", or an identifier, or unary operator

Error (10500): VHDL syntax error at shifter.vhd(21) near text "elsif"; expecting "end", or "(", or an identifier ("elsif" is a reserved keyword), or a sequential statement

Error (10500): VHDL syntax error at shifter.vhd(24) near text "elsif"; expecting "end", or "(", or an identifier ("elsif" is a reserved keyword), or a sequential statement

Error (10500): VHDL syntax error at shifter.vhd(27) near text "elsif"; expecting "end", or "(", or an identifier ("elsif" is a reserved keyword), or a sequential statement

Error (10500): VHDL syntax error at shifter.vhd(29) near text "if"; expecting "process"

how can i fix this?