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Altera_Forum
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12 years ago

IC delay between Global clock buffer to IOBUF causing timing violations

Hi I am trying to fix timing violations on my design, IC delay between global clock buffer to IOBUF is causing a negative slack of -1.698. I have tried to instantiate regional clock buffers i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Are you driving the clock off the chip? More information here would be helpful, such as the output of "report_timing" for this path.

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Using ALTLVDS mega function fixed this issue, thanks for your response though.