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AUden's avatar
AUden
Icon for New Contributor rankNew Contributor
7 years ago

I2C implementation in VHDL

Hey ! i am trying to implement i2c protocol using VHDL Language. In my Case Master is Arria V FPGA & Slave is ADV7182. The issue what i am getting is Acknowledgement. I am getting not Acknowledgem...
Tricky's avatar
Tricky
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

I suggest not using SCL_CLK as a clock. It is very slow compared to the FPGA clock and wont be a very good clock. Use the FPGA clock for everything and use the SCL_CLK you generate as a clock enable for the I2C registers.