I want to convert Xilinx pg057 fifo generator into Intel FPGA FIFO

Hi community,

I am trying to convert the pg057 fifo from xilinx to Altera FIFO.

I want to have an AXI-Stream Interface type.

I have the following questions that need to be answered -

Q1. How to map the signals tdest, tid, tlast, tready, tuser and tvalid from xilinx to altera's Streaming FIFO ecosystem?

Attaching the document from xilinx .

BR,

Piyush