I am using Quartus Prime Lite v18.1 and targeting the MAX 10 10m16scu169a7g in my project which uses the UFM IP. For ModelSim simulation I am having a problem/questions in initializing the UFM.

Hi,

For initializing UFM refer the below link,

https://www.intel.com/content/www/us/en/programmable/documentation/vgo1395753117436/vgo1397658768910/vgo1414722330896.html

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)

I hve in fact used the On-Chip Flash Intel FPGA IP Core (thru Platform Designer) to initialize the UFM with a .mif file and a .dat file for simulation.

1. For Initialize flash content selected without my custom init files it says as follows. "The on-chip flash will be initialized from the ufm_onchip_flash_0.hex

ufm_onchip_flash_0.dat for simulation "

However I cannot find these files anywhere . If I could at least locate

these files I could compare the .hex to the .dat files to each other which I

could then use as an example to create my own .dat file. Why are they

not present? Right now I have my own custom .mif and .hex file but no

.dat file. Can you advise me as to their path or otherwise just send

them both to me?

The Embedded Design Handbook and the Convert Programming Tool

refer to .sof and .pof and in regards to NIOS which I am not using in my

project. I just need simply to go from .hex to .dat. I have seen hex2bin

apps available but is a .dat format required for simulation equivalent to a

binary format?

also, 2. There does exist an "INIT_FILENAME_SIM" field in the

altera_onchip_flash.v file that is initially set to "". It is supposed to be

automatically set to "MyFileName. dat" upon finishing with the

Platform Designer for the UFM but it remains at "" so it does not

seem to accept any file names for init sim that I entered into Platform

Designer so there could be an issue with the UFM IP Core Generator or

Platform Designer?

also, 3. I was advised to make changes to the Set_module_assignment

postgeneration.simulation.init paramater in the hw_tcl file. There is no

hw_tcl file present for the UFM. Hoever I can it one using Platform

but then the generated ufm_hw.tcl file does not contain the said

paramater so still I cannot affect it.

Hi,

Please refer the below link & that might help to proceed further,

https://www.youtube.com/watch?v=Z0l0GrjXn8w

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)

Hi Vikas,

Thanks for responding. However I am not using Nios for this project nor am I doing reconfiguration as this video focuses on.

I am more concerned with the ability to simulate a project showing activity of the UFM signals especially its avmm_readdata output

as the address increments along with the proper control signals. Except for the avmm_readdata output always being shown as xFFFFFFFF

the other signals seem correct to me in ModelSim. I believe that the UFM using the Platform Designer (QSYS) was implemented correctly.

If there was an example for ModelSim simulation available for me to follow it would be helpful but I have not found any. I did find an project example

using the Signal Tap Analyzer with documented waveforms that should run on the MAX 10 FPGA Development kit. We just ordered this kit so I hope to soon excersize this example while learning the Signal Tap Analyzer.

It would have been so much easier to just simulate with ModelSim which I could immediately do since I am familiar with this tool.