Forum Discussion
DNguy11
New Contributor
New ContributorHow to write a Verilog to implement -MULT(27x27) so that QPRO map the full functionality to 1 DSP?
Using QPRO it is possible to build an IP to implement -(X*Y) where X and Y are of 27 bit-width. However I find NO verilog writing style such that QPRO is able to map the full functionnality within 1 ...
KennyT_altera
Super Contributor
Super ContributorIf that is the case, you might have to use the IP from the IP catalog. Can you look into using those?
- DNguy11
For portability reason I need to go though Verilog. Does it mean that QPRO is not able to infers such a basic DSP functionality?
