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LChen23
New Contributor
New ContributorHow to workaround the ERROR ID:18694
Hi, When I switch Quartus from 18.1std to 19.4 Pro,Quartus report an error, The ID is ID:18694 ID:18694 The reference clock on PLL "<name>", which feeds an Altera LVDS SERDES IP instance, is not d...
FvM
Super Contributor
Super ContributorHello,
quoted error message states the requirement of using a reference clock input from the same IO bank. The statement seems to contradict Cyclone 10 GX manual that optionally allows a reference clock of a different bank. No doubt that clock routing involves additional jitter, but we are not neccessarily talking about maximal data rate. Just to reenable functionality specified in user manual and remove an obviously erroneous error message that hasn't been there in previous Quartus versions. Unfortunately it's still present in QPP 22.4.
quoted error message states the requirement of using a reference clock input from the same IO bank. The statement seems to contradict Cyclone 10 GX manual that optionally allows a reference clock of a different bank. No doubt that clock routing involves additional jitter, but we are not neccessarily talking about maximal data rate. Just to reenable functionality specified in user manual and remove an obviously erroneous error message that hasn't been there in previous Quartus versions. Unfortunately it's still present in QPP 22.4.
