ZhiqiangLiang
Occasional Contributor
Occasional Contributorhow to set those parameters of clock crossing bridge?
Hi, My FPGA model is Cyclone 10 LP 10CL120YF484. on Platform Designer, NIOS frequency is 80MHz, and my IP is 160MHz. In NIOS C code, I would like to read/write registers of my IP. In my design, ...
I reviewed some diagrams on the website, and based on what I saw, option 2 is actually the correct setup. The diagrams clearly indicate that option 2 is the proper way to connect.
