Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI don't think virtual generated clocks are allowed(they didn't use to be). In general everyone uses a virtual clock. You don't need to know what port it binds with. When you do a set_input_delay, for example, you tell what data port it is referencing, and TimeQuest knows what clock drives that input register and what input port that clock comes in on, so it binds them that way.
The only time a virtual generated clock would be nice is on source-synchronous outputs, where you put a generated clock on an output port and will use this for the set_output_delay constraint on data being sent with that output clock. I often want to say that the external receiver is doing a 90 degree phase-shift, which could be done with a virtual generated clock. Instead I just say the output clock hase -phase 90 directly on that output clock. (Sorry if that's too far off topic...)