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Altera_Forum
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9 years ago

How to see the content of the SDRAM in my DE1-SOC while running (JTAG Altera cable) ?

I have made a simple design in Quartus Prime, in verilog code, not using megawizard, but directly accessing the pins of the SDRAM. I am saving 2 x 16 bits binary numbers on 3 of the 4 banks of the SD...
Altera_Forum's avatar
Altera_Forum
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9 years ago

I'm afraid your code won't result in anything being written to the SDRAM. Your state machine doesn't do the right things to control the SDRAM.

Have a look, and try to understand, the sdram state diagram on this page (http://www.anandtech.com/show/3851/everything-you-always-wanted-to-know-about-sdram-memory-but-were-afraid-to-ask/3). I hope it gives you an idea of the work involved.

How much data to you have to store? Could you make use of the FPGA's internal RAM?

Cheers,

Alex