how to sample io pin using signaltap 2 logic analyzer?

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using signaltap2 logic analyzer, when sample io pins , the waveform always low , but in fact , the pin is not always low .what is the matter?

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How do you know the pin is not always low? Your io pins are input or output or birdirectional bins?

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input pins and output pins are no problems. but bidirectional pins always low. i use oscilloscope to test the bidirectional pins are not always low.

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What Quartus software's version are you using? I used Quartus 8.0, I can't not add the bidirectional signals into Signaltap. The version 8.0 software does not permit. I'm not sure that this can help you. But if you Quartus 8.0 or older version, it is strange that you can see the bidirectional in signaltap.

In my QuartusII 8.0 , I only see the bidirectional signals by input them to a flop-flop, then add the output signal of flip-flop into signaltap.

tools->signal tap ii analyzer, enter into the signal tap ii analyzer.

edit->add nodes->filter->

you will see the pins:input, pins output, pins: bidirectional,etc.

both q8.0 and q9.0 support input,output and bidirectional.

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input pins and output pins are no problems. but bidirectional pins always low.

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Bidirectional pins are not generally inaccessible by SignalTap II. I often monitored complete data busses without a problem. But in some cases, SignalTap don't connect them, apparently depending on the way, the bidirectional pin is connected in the design. I didn't yet figure out a rule.