How to remove the Unused_RX_Clock_Workaround_PMR_CDR_PLL which inserted by Quartus Prime fitter ?

Hi, I have a FPGA system which include both DDR4 IP and USB3 controller. The Quartus prime 18.1 build 222 has inserted lots of Unused_RX_Clock_Workaround_PMR_CDR_PLL during place&route: U...