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Altera_Forum's avatar
Altera_Forum
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16 years ago

how to reduce the DDR2 simulation time in modelsim

I am simulating a project containing a DDR2 controller using modelsim altera version. I simulate the sourcefile, not the compiled VHO, using the simulation model provided by the DDR2 ip from quartus II. But this takes a long time, because, after the reset, there are 70 microseconds waiting for the DDR2 controller to initialize itself and the RAM. Is it possible to reduce this time? Is there some trick to cut this time?

thanks and regards to all

Davide

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    It all depends how accuratly you are trying to simulate everything. The closer you want to to be to the actual hardware, the longer simulation times are going to be. But if you want really fast, and dont care about propagation delays and such, it might be good to write your own behavioural model of the memory. How you implement this model depends on the usage. if you're only accessing memory sparsly, it can be great to use pointers and only assign memory as its needed.