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Altera_Forum's avatar
Altera_Forum
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14 years ago

How to probe the output of ALTLVDS_RX megafunction with SignalTap ?

I want to acquire the ADC data by ALTLVDS_RX megafunction in the EP2S15F484I4.

I also want to probe the output of the ALTLVDS_RX megafunction by signaltap,but we cannot tap the data output from a serializer/deserializer (SERDES) block by signaltap according to the handbook.

Could anyone please tell me some other methods to probe the output of the ALTLVDS_RX megafunction?

Thanks.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    You can probe the deserializer parallel output.

    --- Quote End ---

    Thank you very much!
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    Also I can't place an output pin at the output of the lvdx_rx

    --- Quote End ---

    You mean, you don't know how to place and connect outputs for a bus in schematic design? The problem isn't related to LVDS_RX, I think. Without connecting in- and outputs, your design won't be synthesized and can't be probed in simulation.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    --- Quote Start ---

    You mean, you don't know how to place and connect outputs for a bus in schematic design? The problem isn't related to LVDS_RX, I think. Without connecting in- and outputs, your design won't be synthesized and can't be probed in simulation.

    --- Quote End ---

    I am sorry for my unclear discription. In fact I can place the output pin at the output of the lvdx_rx for a bus in the schematic design. But What I want to say is that when I place the output pin at the output of the lvdx_rx the compiler is not successful in Quartus II 9.1 SP 2. I wonder it is the problem of Quartus II. So I want to update Quartus II to have a try.

    Could you please give me some advice ?

    Thank you very much for you reply.