Forum Discussion
Altera_Forum
Honored Contributor
13 years agoOn a side note, I am not too sure about the code snippets above to be the proper way of crossing clock domain boundaries for vectors or arrays of vectors, I am thinking about the following is better, how do you think?
cross_registers: process (rst, clk)
begin
if rst = '1' then
cnt_s <= (others => (others => '0'));
elsif rising_edge(clk) then
cnt_s <= cnt_s(0) & cnt;
if cnt_s(0) = cnt_s(1) then
new_cnt <= cnt_s(1);
end if;
end if;
end process cross_registers;