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Altera_Forum
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17 years ago

How to prevent conversion to "equivalent circuits with latches"

Hi everyone... I'm currently working on a Rijndael (AES) Decryptor using the Stratix III family and trying to add a Key check when the Load signal is set to prevent RoundKey re-generation if the Key ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Yes, I see. But you should try to find a way to use a synchronous load instead. Otherwise I can hardly imagine, how you want to achieve predictable design behaviour, apart from the present synthesis problems.