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Altera_Forum
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12 years ago

How to observe Verilogcode execution sequence of Statements in ModelSim 11.1d

Hi All, I am using ModelSim 11.1d to simulate my Verilog code and I am trying to understand and watch the sequence of statements executed. How do I see the sequence of events in the simulator? Wh...
Altera_Forum's avatar
Altera_Forum
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12 years ago

That trace looks like it may be from Verilog-XL; an interpretive simulator that no longer exists.

In Modelsim, you can use the step and see commands to get similar output.

For longer traces, you may want to use a Tcl script. 

proc linetrace1000 {} { for { set n 0} { $n < 1000 } {incr n} { step; see 0 }}