Forum Discussion
9 Replies
- KennyT_altera
Super Contributor
Hi,
Is this related to FPGA question?
Thanks
- TerryC1
New Contributor
HI,
Yes, it's about CPLD.
Thanks.
- SyafieqS
Super Contributor
Hi Terry,
May I know where did you get Archer_City_PLD_source_code from? is from Intel?
Are you refering to MAx 10 device for these two 10M05 to 10M0 respectively?
Is is unclear to me what you are trying to achieve.
Regards,
Syafieq
- TerryC1
New Contributor
Hi SyafieqS,
Yes, I download it from Intel IBL.
Yes. I am refering to MAX 10 device for 10M05 and 10M02 respectively.
I want change Archer_City_PLD_source_code from 10M50 to 10M02 to fit my project.
Thanks.
- SyafieqS
Super Contributor
Hi Terry,
Understood. If you intend to keep the same design only to migrate to different device which I assume it can be fit (resource differences), I believe maybe few changes on the pin assignments are needed, the rest should be able to pass the flow.
- TerryC1
New Contributor
Hi SyafieqS,
There is an error in the execution process as below picture.
I don't know what the error means ?
Thanks.
- SyafieqS
Super Contributor
You can go to device and pin option, change the config mode to single image. The reason is your migrate device does not support multiple image.
- SyafieqS
Super Contributor
May I know if there is any update?
- TerryC1
New Contributor
Yes, we change the config mode to single image. But there are other error message. We are trying to solve.