How to let customers update the FPGA firmware

The Altera API functions for writing to EPCS aren't entirely ideal.

Mostly because they always erase the flash sector before doing a write (even if the area being written is all 0xff).

That means that you have to have a large buffer available - which may be a problem if you don't have external memory.

I would dig down a couple of layers of functions and use the lower level ones (or write equivalent ones that are smaller and faster).

Another problem is that you don't seem to be able to get the EPCS SPI block without having the EPCS boot code. I don't know if it is possible to get the boot code memory optimised away by using a conduit to force the address lines to desect it.

I also suspect the nios could bit-bang the raw SPI pins fast enough.