Honored Contributor
Honored ContributorSo basically my setup could be describe as:
A microcontroller acts as a bridge between the FPGA and the USB connection. It is a EZ-USB FX2 microcontroller from Cypress Semiconductor. Two endpoints (read and write) are used for bulk transfers. They each have 512 bytes dual buffers. The endpoints are accessed from the FPGA using a 16 bits bidirectional FIFO bus and simple controls and flags. The software in the microcontroller runs independently of the endpoint, to allow the fastest transfer possible. This software contains a code that turns the microcontroller to a USB JTAG adapter. It allows the device to emulate the USB-Blaster Download Cable from Altera and program the FPGA through the same USB connection. General purpose IO pins from the Cypress microcontroller are connected to the JTAG port to program the FPGA and its flash memory. The code was originally written by FPGA4fun, FPGA4U and other collaborators and it was modified and enhanced to suit our needs. thx for the link for linux64 it solved the problem ! THX
