Forum Discussion
Altera_Forum
Honored Contributor
16 years agoI'm not a VHDL guru. I use Verilog. But I frequently do what you are trying to do. My method is to override the memory initialization file for each particular instance using the assignment editor.
Here is an example of the resulting assignment in the QSF file:set_parameter -name INIT_FILE trio_boot_loader_epcs.hex -to "trio_sopc:trio_sopc_inst|epcs_controller:the_epcs_controller|altsyncram:the_boot_copier_rom" So this takes precedence over whatever file is called out in the code itself. The easiest way to do this is to browse through the design hierarchy in the project navigator until you find the RAM module that you want to change the MIF file for, then right click on it and select Locate->In Assignment Editor. Then just make a "Parameter" assignment to it. This is just one method but it works well for me. Jake