How to initialize content of a RAM without using Megawizard

instead of using a text file, generate a VHDL package instead:

package mem_package is
  
  type RamType is array (0 to 63) of bit_vector(31 downto 0);
  constant MEM_INIT : RamType := ( 
               x"0000",
               x"0001",
             ......etc
      );
end package mem_package;

Then in your source code you can just say

use work.mem_package.all;
.....
signal myMem : RamType := MEM_INIT;

Then you can re-write or modify the package without having to worry about the source. The package could be generated via the same method you generated your ram_init.txt