How to import Logiclock regions with partition into upper level project using Pro

Question

I can export a qdb partition file from a lower level project and import it into an upper level project as a design partition. This works fine. How do I import the LogicLock regions along with all the other information?

I haven't found any info on the forum, on the help topics, on example projects and non of the FAEs seem to know if you can import LL regions into upper projects using Pro.

I have done this for over a decade in Quartus and Quartus Standard. How do you do this in Pro? Can you? or is there something else you should be doing? Do I need to manually recreate all the lower level LL regions?

calvinjoaz_p_intel · Answer

Hi DBay,

Kindly refer to 'Intel® Quartus® Prime Pro Edition User Guide Block-Based Design' and 'Intel® Quartus® Prime Pro Edition User Guide Getting Started' link below.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-block-based-design.pdf

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-getting-started.pdf

Thank you.

kennyt_altera · Answer

Do you mean import LL region to another project? in Q18.1pro, there are only import design qdb files. There are no import LL region option available. If you want to have the same logic location. Just  put design partition as post fit.​

dbay · Answer

Post fit has an error that says you have to import something after the final post fit. Is that post-postfit? I didn't see a post, post fit option? Must be in the 2020 version of quartus.....

Or at other times it crashes quartus......

Basically the documentation is flat out WRONG for all but the most basic operations and what has worked so well for many years is horrendously broken.

In one fell swoop Intel has made what Xilinx hasn't ever been able to do, Vivado actually looks good compared to Quartus. This is coming from a 30+ year very experienced user of Quartus, who has always laughed at and steered away from anything Xilinx related! Of course this is my first real project using the "new" Quartus. I think anything after 14.x is probably like this or close.

kennyt_altera · Answer

Hi DBay,In Quartus Std, its called post fit.In Quartus Pro, its called final.The above link posted by Calvin mention the meaning for this. Basically, the functions its similar. what error did you get? Did you port over your design from Std to Pro and get error? If that is the case, it would be expected because Qpro no longer understand the assignment for std.If you are migrating your design, I would advise you to look into the document https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/qts/archives/qts-qpp-5v1-17-1.pdf This document explain what you need to do when you migrate from std to pro.Or you can attend 25min class  https://www.intel.com/content/www/us/en/programmable/support/training/course/omigqpro.htmlThanks,​

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How to import Logiclock regions with partition into upper level project using Pro

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