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Honored Contributor
Honored ContributorHow to ensure multiplexer priority levels coded in VHDL
Hi, How to ensure a value "CAFE" on the register Reg_In with the RTL code:Reg_In <= X"CAFE" when A = '1' else In_1 when K = '1 else In_2 when L...
Altera_ForumHonored Contributor
Honored ContributorIm not sure what the question is, as you have already posted the code that prioritises A over K, L and M.
