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Altera_Forum
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8 years ago

how to design Filters using verilog and nios? like butterworth, high and low pass etc

Dear sir,

I am Mtech final year student. Right now I am working on ac energy parameter monitoring system. In my project I want to design filters for noise reduction like low pass , high pass , butterwort, chebysev etc... so can u plz suggest me how to make filter in fpga using Verilog. Step for implementing , any notes, materials etc....

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Basically what you need is rather to calculate the filter parameters and normalize them for integers. Or that is what I have done in the past. Filters are basically additions of different "volumes" over a length of time. The Code itself is not the hard part. But what I tend to do for simple filters is to simulate an ordinary RC filter like this out<=out+(k*(in-out)/256) ... K being 0-256 here.. this also works with resonance and feedback if you limit the signals and what not. Interpolation uses the same formula but with different inputs/outputs.

    THis is a piece of PROTOTYPE CODE i used for a synth project.. i ended up not using it .. And for GOD SAKES keep in mind I'm a total beginner at this ... but at least it's something ,right..

    
        reg signed yaudio ;  //yaudio is output from filters (audioout is input)
        reg signed ac;    //accumulator
        always @ (posedge clk30)
        begin
        reg signed b0=68; //lowpass filter response
        reg signed b1=16;
        reg signed b2=68; //(or 76) ,b2 is most often same as b0(could be optimized)
        reg signed a1=117;
        reg signed a2=-54;
        reg signed in;
        reg signed wa,wb,wc;
        reg  l;        //timer limit value
        reg  co;    //the actual timers
        reg signed m;    //feedback level multiplier
        reg  ch;
        l<=(potlim/32);//frequency cutoff
        m<=(potlim/256);//resonance level
        ch<=ch+1;        //8channels, clock through them all
        in = ((audioout+(audioout*m)/32)-((yaudio*m)/8))*4; //do feedback and input
        wa = ((wc * a2) + (wb * a1) + (in /2))/64;        //do filtering
        ac = (wa * b0) + (wb * b1) + (wc * b2);        //do more filtering
        
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end  //rotate data for filter
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end  //faster = higher cutoff
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end  //at different speeds
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
     
        end
        assign     yaudio = ac/256/2;    //do output levelchange
        assign     yaudio = ac/256/2;    //to be able to use all bits
        assign     yaudio = ac/256/2;    //input also does this
        assign     yaudio = ac/256/2;    //and center too
        assign     yaudio = ac/256/2;
        assign     yaudio = ac/256/2;
        assign     yaudio = ac/256/2;
        assign     yaudio = ac/256/2;
    
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Basically what you need is rather to calculate the filter parameters and normalize them for integers. Or that is what I have done in the past. Filters are basically additions of different "volumes" over a length of time. The Code itself is not the hard part. But what I tend to do for simple filters is to simulate an ordinary RC filter like this out<=out+(k*(in-out)/256) ... K being 0-256 here.. this also works with resonance and feedback if you limit the signals and what not. Interpolation uses the same formula but with different inputs/outputs.

    This is a piece of PROTOTYPE CODE i used for a synth project.. i ended up not using it .. And for GOD SAKES keep in mind I'm a total beginner at this ... but at least it's something ,right..

    
        reg signed yaudio ;  //yaudio is output from filters (audioout is input)
        reg signed ac;    //accumulator
        always @ (posedge clk30)
        begin
        reg signed b0=68; //lowpass filter response
        reg signed b1=16;
        reg signed b2=68; //(or 76) ,b2 is most often same as b0(could be optimized)
        reg signed a1=117;
        reg signed a2=-54;
        reg signed in;
        reg signed wa,wb,wc;
        reg  l;        //timer limit value
        reg  co;    //the actual timers
        reg signed m;    //feedback level multiplier
        reg  ch;
        l<=(potlim/32);//frequency cutoff
        m<=(potlim/256);//resonance level
        ch<=ch+1;        //8channels, clock through them all
        in = ((audioout+(audioout*m)/32)-((yaudio*m)/8))*4; //do feedback and input
        wa = ((wc * a2) + (wb * a1) + (in /2))/64;        //do filtering
        ac = (wa * b0) + (wb * b1) + (wc * b2);        //do more filtering
        
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end  //rotate data for filter
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end  //faster = higher cutoff
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end  //at different speeds
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
        if (co++>=l) begin co=0; wc <= wb; wb <= wa; end
     
        end
        assign     yaudio = ac/256/2;    //do output levelchange
        assign     yaudio = ac/256/2;    //to be able to use all bits
        assign     yaudio = ac/256/2;    //input also does this
        assign     yaudio = ac/256/2;    //and center too
        assign     yaudio = ac/256/2;
        assign     yaudio = ac/256/2;
        assign     yaudio = ac/256/2;
        assign     yaudio = ac/256/2;