How to define clock generated by the other clock?

The Problem i face is that the circuit i have attached before produces the frequency i need but not with the correct duty cycle. It is something that i have already measured with the oscilloscope. I repeat that the circuit works but the pulse i get Needs to have a duty cycle at 50 %. Unfortunately the duty cycle seems to be not ok so i do not know if there is a digital way using only gates flip Flops or whatever so that i will not have to Change the development board. But also if things are not so good and there is no possibility to use a digital pll then is there any way to use Phase delays somehow? Regarding the 74297 obviously is not the solution i was looking for so....Keep searching...