Honored Contributor
Honored ContributorI have the similar situation, but CLKB is not connected to FPGA pin:
https://www.alteraforum.com/forum/attachment.php?attachmentid=8239 Quartus 12.1 gives Warning (332060): Node: inst33 was determined to be a clock but was found without an associated clock assignment. What should be done to get rid of this warning? What associated clock assignment should be set in .sdc file for CLKB? P.S. Example at Figure 1. "Divide by 2 Generated Clock" ( create_generated_clock_ex1.qar (http://www.altera.com/support/examples/download/create_generated_clock_ex1.qar) ) in the above mentioned Altera document http://www.altera.com/support/examples/timequest/exm-tq-generated-clock.html after being compiled produces the same Warning (332060): Node: div2reg was determined to be a clock but was found without an associated clock assignment.
