how to decide read time from SDRAM via SDRAM controller

First of all, you have wrong assigment here : az_addr <= (other 0); . It should look like this : az_addr <= (others => '0'); . I don't know how do you assign values to signals, but you should write a state machine to controll read and write process. From your code I can say, that section:

az_addr <= (other 0);

az_rd_n <= '0'; --read enable

az_wr_n <='1'; --write disable

clk and reset_n signal are also assigned

and az_cs <= '1';

az_be_n<="11111111" --data mask disable

write operation

az_data<="11111...1" -- 64 bits

az_rd_n <= '1'; --write enable

az_wr_n <='0'; --read disable

clk and reset_n signal are also assigned

and az_cs <= '1';

az_be_n<="11111111" --data mask disable

assigns values at the same time to all signals.

It would be easier if you could paste your exact code (if the code you have shown isn't the exact code you're using).