How to cut clock speed in half?

Thanks for the help. Is the below code then the correct usage of your second suggestion? Or could I inefficiently run the entire code at 25mhz as that is all that is needed and perhaps easier?

module hvsync_generator(clk, vga_h_sync, vga_v_sync, inDisplayArea, CounterX, CounterY);
input clk;
output vga_h_sync, vga_v_sync;
output inDisplayArea;
output  CounterX;
output  CounterY;
//////////////////////////////////////////////////
reg clk_enable; ADDED LINE
always @ (posedge clk) clk_enable <= ! clk_enable; ADDED LINE
reg  CounterX;
reg  CounterY;
wire CounterXmaxed = (CounterX==10'h2FF);
always @(posedge clk)
if(CounterXmaxed)
 CounterX <= 0;
else
 CounterX <= CounterX + 1;
always @(posedge clk)
if(CounterXmaxed) CounterY <= CounterY + 1;
reg vga_HS, vga_VS;
always @(posedge clk)
begin
if (clk_enable) begin ADDED LINE
 vga_HS <= (CounterX==6'h2D); // change this value to move the display horizontally
 vga_VS <= (CounterY==500); // change this value to move the display vertically
end ADDED LINE
end
reg inDisplayArea;
always @(posedge clk)
if(inDisplayArea==0)
 inDisplayArea <= (CounterXmaxed) && (CounterY<480);
else
 inDisplayArea <= !(CounterX==639);
 
assign vga_h_sync = ~vga_HS;
assign vga_v_sync = ~vga_VS;
endmodule